Integrated circuits include complex circuitry formed through various features in a semiconductor substrate. To design such circuits, the desired functionality is transformed into a design layout, in which each feature within the circuit for a particular layout is laid out so that the desired functionality may be achieved. In some cases, there is flexibility regarding the positioning of various features within the layout.
For example, some photolithographic techniques involve the use of both a main pattern and a cut pattern to form a target pattern. The cut pattern removes portions of features formed by the main pattern in order to achieve the desired target pattern. For example, cut patterns can be used to split main patterns into smaller features to create the desired patterns. Using such techniques provides certain advantages to the photolithographic process. For example, it is desirable to have a large process window. The process window refers to the range of focus and exposure settings that will still produce the desired features into the photo-resist layer. A process window can be improved by keeping features within a pattern to be uniform in density. This may involve placement of “dummy” features. Dummy features are extra features that are placed within the main pattern in order to maintain feature density but do not serve any function within the circuit for which the pattern is designed. Cut features can also be used to separate dummy features from functional features. However, in some cases the cut features may be repositioned within a particular range and the circuitry will still function as desired.
In a further example, vias are often used to connect a metal feature from a first metal layer to a metal feature from a second metal layer. In some cases, the vias must be placed at a precise location in order to make the desired connection. In other cases, however, the vias may move within a defined region and still make the desired connection between metal layers.
It can be beneficial to consider the placement of certain features of certain patterns for energy efficient purposes. Specifically, the placement of certain features, such as vias in a via pattern or cut features in a cut pattern, can have an effect on the efficiency of forming those patterns. Thus, it is desirable to have methods for determining optimal placement of such features.